Chinese semiconductor industry

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gelgoog

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Huawei may have eda tools for 14nm
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So how come Caijing quotes the Huawei executive that they made tools "above 14nm" in collaboration with Chinese EDA companies and Reuters spins it that they have made tools for 14nm? I mean, Reuters is usually better than this.

"above 14nm" means no FinFET. It is probably only for planar transistors up to 28nm and the like. Which is what makes sense for Huawei, since they have like a single factory in the whole of China which can make FinFET for them right now. While there are many factories which can make planar transistor processes.
 

FairAndUnbiased

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The wavelength of x-rays and EUV are worlds apart (0.3nm-3nm vs 13.5nm respectively) that the entire lithography chamber design will be dramatically different just from the difference in focal lengths alone. Not to mention completely different ancillary systems to handle different photo resists and masks that it would be easier designing+building the right system from the start rather than jerry-rig one light source type into a machine meant for another.
How synchrotron end stations work with tunable light sources is that you disconnect the working chamber and put in a new working chamber with the correct optics and sensors. At the very least, it will mean that experimentation and process development with wavelength tuning would be much easier.

This is how you switch between hard X-ray techniques like SAXS and XRD, to soft X-ray/UV techniques like PES.

Hard X-ray instruments:
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Soft X-ray instruments:
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BoraTas

Major
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So how come Caijing quotes the Huawei executive that they made tools "above 14nm" in collaboration with Chinese EDA companies and Reuters spins it that they have made tools for 14nm? I mean, Reuters is usually better than this.

"above 14nm" means no FinFET. It is probably only for planar transistors up to 28nm and the like. Which is what makes sense for Huawei, since they have like a single factory in the whole of China which can make FinFET for them right now. While there are many factories which can make planar transistor processes.
FinFET use started in 22 nm node for Intel. Then TSMC and samsung further upgraded their 28 nm processes and called those 20 nm despite them still having planar transistors and lower performances than Intel 22 nm. Then they introduced a FinFET node finally. They were called 16 nm but their performances were lower than Intel 22 nm in many aspects. Their 12 nm were also just upgraded versions of their 16 nm processes. Intel's 14 nm was a full node development over their 22 nm. This is how we ended up with Intel 14 nm outperforming other's 10 nm processes.

To sum up: The territory FinFET starts becoming a net benefit starts way above 14 nm.
 

huemens

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China unveils indigenous chiplet interface to reach self-reliance amid US containment​


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According to Chinese media Cailianshe, China Chiplet League, collaborating with China-based system integrators, IP providers, and packaging, testing, and assembling manufacturers, unveiled China's indigenous Chiplet Interconnect Interface Standard - ACC 1.0 (Advanced Cost-driven Chiplet Interface 1.0), aiming to coordinate Chinese suppliers in the packaging, testing, and assembly industry, and IC substrate manufacturers to achieve cost-control and business feasibility.

The statement added that to ensure a breakthrough in the technology, China-based suppliers from upstream to downstream have to collaborate to establish an ecosystem, with downstream demands driving upstream investments to achieve economies of scale in mass production, thereby creating a virtuous cycle.

Outside of China, Intel, TSMC, Microsoft, Samsung Electronics, Qualcomm, AMD, and ASE formed the Universal Chiplet Interconnect Express alliance to develop the chiplet ecosystem. According to Omdia, the chiplet market is expected to reach US$57 billion by 2035.
 
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