Chinese semiconductor thread II

huemens

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China makes AI breakthrough, reportedly trains generative AI model across multiple data centers and GPU architectures​

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An industry analyst recently revealed that China has developed a single generative AI (GAI) model across multiple data centers — a massive feat considering the complexity of using different GPUs in a single data center, let alone using servers in multiple geographic locations. Patrick Moorhead, Chief Analyst at Moor Insights & Strategy, said on X (formerly Twitter) that China was the first country to manage this achievement and that he discovered it during a conversation about a presumably unrelated NDA meeting.
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China has gotten very good at creating and running AI training clusters with many more nodes and lower-performing hardware than the US. China was also the first to train a single GAI model across multiple data centers, too. I discovered this at the GSA meeting this week from a very large company I cannot disclose as it was an NDA conversation.
 

OptimusLion

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Official leak: Without using EUV and adopting self-aligned sidewall technology (SADP? SAQP?), China has become the second country in the world after Samsung in South Korea to realize the manufacturing of horizontal GAA devices (node equivalent to 3 nanometers?) on a 12-inch wafer mass production line?


In 2023, the Institute of Microelectronics of the Chinese Academy of Sciences ranked first in the information field in the evaluation results of the "14th Five-Year Plan"; the "National Key Laboratory of Integrated Circuit Manufacturing Technology" was approved for construction. The important progress and achievements of the main scientific research directions in the year are as follows:

4. Created new fishbone-shaped horizontal GAA and hourglass-shaped Ge channel vertical GAA devices, and the related research papers were selected as EDL cover highlights. Horizontal GAA device manufacturing was realized in the domestic 12-inch mass production line.

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Research projects:

(16) Research on HKMG stacking structure and threshold control key technologies for GAA devices at 3nm node and below, Person in charge, Enterprise commission, 2021-01--2022-12

(17) Research on stacked nanosheet gate CMOS devices and integration technology, person in charge, enterprise commissioned, 2021-06--2024-05

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