Chinese semiconductor thread II
- Thread starter vincent
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Just for reference, this is the next CSEAC
China Semiconductor Equipment Materials and Core Components Exhibition (CSEAC)
To be held in September this year in Wuxi
Last year they had , so this year they will be even more, they highlight 640+ Exhibitors for 2024 edition.
This is really beyond impressive! Only 2 years ago, in 2022, . So it is 6X in number of companies in just 2 years!
I always thought that the nation with the most complete supply chain in semiconductor is Japan, but maybe I will have to change my mind...or maybe I can already change it...I'm just waiting for SMEE Litho machine to be officially out, or, more realistically, to have confirmation that is used at SMIC in volume production. I don't expect they will officially announce anything.
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EUV FEL is in Dalian.
Is there some fundamental barrier that prevents moving from EUV to even shorter wavelengths like X-rays in lithography? Is the difficulty with optics? I know that EUV had to use mirrors for optics instead of lenses.
Problem with euv is that photoresist are not well developed. FEL light source won't reduce stochastics and coherent light does not offer any advantage. On the other hand difficulty to operate a particle accelerator in an industrial setting is understated. They are not reliable at all.
Photons are way too energetic. Resist outgassing is a huge problem. Photomask may not survive the damage. All in all lithography will run out of steam. ASML will continue to fine tune and upgrade the machines but the idea of a big technological jump is impossible. Samsung is planning 3D DRAM starting production in early 2030s. Embedded systems will introduce MRAM. I doubt leading edge logic really wants to beat such high costs of lithography based scaling. They will focus on cfet and 2D materials.
“A few days ago, I heard something truly starting from BYD Exec Li Yunfei”
startling?
“but even that did not compute to BYD building such a large SiC fab.”
compare?
But will increase power without increasing cost too much increasing throughput. In fact, it could also reduce stochastic, I think the biggest with ASML EUV machines is that they are underpowered to achieve enough contrast in the photoresist and ASML has to do this delicate balance between throughput and pattern quality as seen in some research done using synchrotron EUV radiation.
Apart FEL offer other advantages like they could power multiple EUV machines, don't require collector mirrors, reduce the needs of EUV optics, reduce the need of hydrogen infrastructure.
One the reason is because most FEL are built for multiple experiments in mind they have more hardware that would be required for EUVL, reducing unnecessary hardware would reduce size and cost. Also the same could have been said about mercury vapor lamps and excimer lasers which are notoriously difficult to make, expensive and very unreliable <Compared to others light sources> when they started to be used in lithography and still today to the point that only three companies can make excimer lasers for lithography, US Cymer, Japan Gigaphoton and China RSLaser.
I would agree that dimensional scaling is over, but throughput needs to increase significantly before going to methods that would require more patterning steps or cost are going to eat the industry.
Zhongke Zhixin Wafer-Level Advanced Packaging Project Signed in Hangzhou Xiaoshan Planned Investment of 1.75 Billion Yuan
On June 8, the 2024 Keqiao Development Conference and the signing ceremony of major investment projects were held. Among them, four projects in the Hangzhou-Shaoxing Airport Demonstration Zone were signed, including the Zhongke Zhixin wafer-level advanced packaging project, the new energy and automotive-grade electronic control module production project, etc.
According to the news from the Shaoxing section of the Hangzhou-Shaoxing Air Demonstration Zone, the Zhongke Zhixin wafer-level advanced packaging project, located in the Hangzhou-Shaoxing Air Demonstration Zone, is a pan-semiconductor industry project invested by Jiangsu Zhongke Zhixin Integrated Technology Co., Ltd., with a planned investment of 1.75 billion yuan and a planned land area of 40 mu. The project mainly constructs wafer-level advanced packaging, including ultra-thin chip preparation, bumps, chip scale packaging, fan-out packaging, system integration packaging, and three-dimensional stacking packaging.
The new energy and automotive-grade electric control module production project is located in the Hangzhou-Shaoxing Airport Demonstration Zone. It is a pan-semiconductor industry project invested by China Power (Hong Kong) Technology Co., Ltd., with a planned investment of 120 million US dollars and a planned land area of 30 acres. The project mainly constructs automotive-grade power control chip module packaging and power MEMS sensor packaging.
According to the news from the Shaoxing section of the Hangzhou-Shaoxing Air Demonstration Zone, the Zhongke Zhixin wafer-level advanced packaging project, located in the Hangzhou-Shaoxing Air Demonstration Zone, is a pan-semiconductor industry project invested by Jiangsu Zhongke Zhixin Integrated Technology Co., Ltd., with a planned investment of 1.75 billion yuan and a planned land area of 40 mu. The project mainly constructs wafer-level advanced packaging, including ultra-thin chip preparation, bumps, chip scale packaging, fan-out packaging, system integration packaging, and three-dimensional stacking packaging.
The new energy and automotive-grade electric control module production project is located in the Hangzhou-Shaoxing Airport Demonstration Zone. It is a pan-semiconductor industry project invested by China Power (Hong Kong) Technology Co., Ltd., with a planned investment of 120 million US dollars and a planned land area of 30 acres. The project mainly constructs automotive-grade power control chip module packaging and power MEMS sensor packaging.