Chinese semiconductor thread II

[tokenanalyst]

Hans Semiconductor Next-Generation Silicon Photonics Hidden Cutting Technology Activates Industrial Leap Forward​

Amid the rapid expansion of artificial intelligence, data centers, and high-speed optical communications, silicon photonics has emerged as a critical pathway for meeting surging computing demands. In response to this industry shift, Han’s Semiconductor has launched the DSI-S-TC9261, a next-generation silicon wafer laser stealth dicing machine. Built on proprietary laser stealth dicing technology, the equipment is specifically engineered to meet the stringent processing requirements of high-density, high-precision, and ultra-thin silicon photonics chips, providing essential manufacturing support for large-scale device production.

The DSI-S-TC9261 integrates several advanced capabilities tailored to optical waveguide, lens, and module structures. It features a customized HDE optical engine and upgraded OAS system optimized for mass production workflows. The machine supports ultra-narrow dicing tracks of ≤20μm via back-cutting processes without laser-induced thermal damage, significantly improving wafer utilization and yield. It cleanly cuts delicate optical thin films while preserving waveguide and lens integrity, eliminating residue or performance degradation. Additional innovations include an infrared back-side alignment camera for precise SDAG invisible cutting, compatibility with wafers as thin as 50μm (and dies down to 200μm), and exceptional sidewall control that prevents edge chipping or micro-cracks, thereby boosting chip strength and reducing downstream packaging losses.



The equipment has already completed full-process validation with a leading domestic silicon photonics module manufacturer and is actively deployed in mass production lines. Benchmarking data confirms that the DSI-S-TC9261 operates stably and outperforms comparable imported systems, earning strong industry recognition. As wafer dicing standards continue to evolve toward higher precision, yield, and efficiency, Han’s Semiconductor’s solution delivers reliable process support that accelerates silicon photonics commercialization, strengthens domestic supply chains, and propels the broader optoelectronic interconnect industry forward.

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[tokenanalyst]

Guangdong's 15th Five-Year Plan: Focusing on Chips, AI, and Automobiles​

Guangdong’s newly released 15th Five-Year Plan charts a strategic course for the next five years centered on technological innovation and industrial upgrading, positioning integrated circuits as a core breakthrough sector. The province aims to leverage its existing strength in chip design while rapidly expanding manufacturing capacity anchored by real-world applications. By prioritizing mature process technologies and compound semiconductors, Guangdong will orchestrate differentiated regional development, establishing Shenzhen as an innovation hub and coordinating complementary roles across Guangzhou, Zhuhai, Dongguan, and other cities to build a unified provincial semiconductor ecosystem.

To overcome critical supply chain vulnerabilities, the plan aggressively targets breakthroughs in optical chips, artificial intelligence processors, high-bandwidth memory, and advanced packaging and testing technologies. Parallel initiatives will fortify domestic production of core equipment, components, and essential materials, specifically addressing bottlenecks in high-end photoresists and high-purity wet electronic chemicals. The strategy also emphasizes developing specialized computing power chips to provide robust foundational support for intelligent hardware networks and next-generation computing infrastructure.

In the artificial intelligence domain, Guangdong is committed to building competitive software-hardware ecosystems and dynamic digital industry clusters focused on intelligent operating systems, development frameworks, and advanced training, inference, and edge-computing chips. The province will drive an “AI-native” transformation by scaling smart agent applications through tightly integrated “big brain” and “small brain” architectures, while deploying AI models to revolutionize new materials research. A provincial AI innovation center dedicated to intelligent agents and terminals will be established alongside active regulatory pathways for registering both invasive and non-invasive brain-computer interface medical devices.

Leveraging its traditional manufacturing base, Guangdong is elevating intelligent connected vehicles to an emerging pillar industry by accelerating autonomous driving innovations and deploying dedicated testing zones with vehicle-road cooperative infrastructure. Market stimulation will rely on a hybrid policy framework combining government subsidies, corporate concessions, and financial support for vehicle trade-ins, replacements, and new purchases, while expanding aftermarket services like customization, leasing, and comprehensive recycling systems. To secure long-term sector competitiveness, the province is simultaneously scaling hydrogen fuel cell deployment and investing in solid-state batteries and other next-generation power technologies.

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[tokenanalyst]

Dry transfer enables flexible integration of wafer-level single-crystal two-dimensional semiconductors.​

Recently, the team led by Kong Wei at Westlake University announced the achievement of wafer-level lossless integration of single-crystal molybdenum disulfide thin films on flexible substrates. This advancement of single-crystal two-dimensional semiconductor transfer integration technology from a "wet" to a "dry" approach provides a new path for overcoming the long-standing technological bottlenecks that have constrained the development of high-performance flexible electronics. The relevant research results were recently published in the journal *Nature Electronics*.

Two-dimensional semiconductor materials, represented by single-crystal molybdenum disulfide, combine atomic-level thickness and flexibility with excellent electrical properties, making them important candidate materials for developing high-performance flexible electronic devices. However, achieving clean, high-quality, and scalable transfer and integration remains a challenge for the industry.

The research team developed an oxide-based "dry transfer" strategy that avoids direct contact between the molybdenum disulfide surface and polymers, water, or organic solvents throughout the process, effectively preserving the material's intrinsic properties. "Based on this process, we have achieved several performance breakthroughs in the wafer-level high-density flexible transistor array we have constructed, " Kong Wei explained.

The research team used this transistor array in an active matrix tactile sensing system, which was then attached to the surface of a soft robot's hand. This system can sense and map pressure distribution in real time, helping the robot identify the shape, position, and size of objects.​

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[gotodistance]

The semiconductor supercycle debate is resurfacing as Samsung Electronics and SK Hynix reported all-time results of 71% operating profit in the first quarter.
However, analyst Lee Ju-wan makes the opposite diagnosis. Tracking bit-gross data over the past 20 years, the growth rate of actual memory demand has barely deviated from a constant trend line since 2015, and there has been no significant change before and after the AI boom.
The variable he pays attention to is supply, not demand. According to statistics from SEMI, the Global Semiconductor Equipment Association, shipments of silicon wafers have decreased by 20% over the past three years, and the semiconductor utilization rate of Statistics Korea in Korea has also remained at the 70-75% level. In the end, Samsung and SK Hynix intentionally raised prices by continuing production cuts. It is also pointed out that although demand for data centers has increased, demand for other fields such as smartphones, PCs, and automobiles has decreased at the same time, and aggregate demand is virtually stagnant.
Analysts Lee Ju-wan believes that such a production cut strategy is difficult to sustain for more than a year. This is because Micron and China are rapidly filling the vacancy and eroding the market share of both Korean companies' DRAM and NAND. Once prices start to fall, both companies have no choice but to increase production to defend their sales, and from that point on, the bubble can quickly fall out.
How do you view this data-based diagnosis?

 

[tokenanalyst]

Beijing Zhongke 3D IC patent was approved
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Zhongke Beyond has obtained a patent for achieving three-dimensional stacked chip interconnection through a sacrificial layer.​

According to information from the State Intellectual Property Office, Beijing Zhongke Bian Integrated Circuit Technology Co., Ltd. has obtained a patent entitled "A Method for Connecting Three-Dimensional Stacked Chips Through a Sacrificial Layer", with authorization announcement number CN121620190B and application date of January 2026.

According to Tianyancha, Beijing Zhongke Bian Integrated Circuit Technology Co., Ltd., established in 2022 and located in Beijing, is a company primarily engaged in technology promotion and application services. The company's registered capital is 1,054,421.6 RMB. Tianyancha's big data analysis shows that Beijing Zhongke Bian Integrated Circuit Technology Co., Ltd. has 14 patent records and one administrative license.

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[tokenanalyst]

With a total investment of 2 billion yuan, the foundation stone was laid for a 12-inch wafer regeneration project!​

Fullertech Yangtze Semiconductor (a Ferrotec Group company) has officially broken ground on a 12-inch wafer regeneration facility in Hefei’s New Station High-tech Industrial Development Zone, backed by a total investment of 2 billion RMB.

The 132-acre site will be built in two phases. Phase 1 (~1B RMB) will deliver 300,000 wafers/month capacity (~400M RMB annual revenue). Full completion will scale to 700,000 wafers/month with annual revenue exceeding 800M RMB. The company has developed proprietary wet-chemical film removal, grinding, and polishing processes that break the long-standing monopolies in large wafer regeneration. Its technology supports advanced process nodes of 19nm and below and significantly expands China’s domestic capacity for high-precision wafer recycling, strengthens supply chain security for advanced logic and memory chips, and boosts Hefei’s integrated circuit industry ecosystem.

The facility marks a major step in China's semiconductor supply chain, combining scaled domestic production with proprietary advanced-node regeneration technology.​

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[tokenanalyst]

Suzhou aims to expand and strengthen its photonics industry cluster, and build an 8-inch silicon photonics production line and a heterogeneous integration platform.​

Suzhou has designated photonics as a key emerging industry, aiming to become China's "City of High-Performance Photonics." Central to this strategy is the construction of an 8-inch silicon photonics production line and a heterogeneous integration platform to support AI, 6G, and autonomous driving applications.

Market response has been strong: between April 2025 and 2026, Suzhou photonics stocks surged, with Zhongji Xuchuang up over 10x and peers like Changguang Huaxin and Hengtong Optic-Electric gaining 300–600%. Dongshan Precision joined the "300 billion yuan club" after entering the optical module market, reflecting investor confidence in Suzhou's strategic layout.

The city's strength lies in specialized regional clusters. Suzhou High-tech Zone hosts 350+ photonics enterprises and the Taihu Photonics Center; Wujiang District leads in optical fiber communication with a full industrial chain; Suzhou Industrial Park advances laser chips and silicon modules; and Kunshan excels in optical display integration.

Recent momentum includes three major projects: China's first 8-inch silicon photonics mass production line broke ground in March 2026; a ¥5 billion Optical Communication Industrial Base was signed in April; and Tianfu Communication launched a new headquarters for high-speed optical devices. These initiatives aim to build a domestic, controllable optoelectronic chip ecosystem.


Supporting this growth are coordinated ecosystems: the China (Suzhou) Photonics Industrial Park (20 parks, 12M㎡), industry-university-research platforms with top universities, and a ¥10 billion dedicated investment fund. Market-driven institutes like Suzhou Xihe Photonics Research Institute further accelerate commercialization.

As photonics becomes critical to AI and next-gen connectivity, Suzhou is connecting innovation, industry, capital, and talent chains to turn its "City of High Light" vision into reality—and invites global partners to join the journey.

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[tokenanalyst]

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[tokenanalyst]

The good stuff. Commercialization of EUV masks and optimization.
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Full-chip EUV curvilinear mask optimization.​

School of Mechanical Science and Engineering, Huazhong University of Science and Technology,
Optics Valley Laboratory
Yuwei Optica Co., Ltd

Abstract

As semiconductor manufacturing advances towards finer feature sizes, mask optimization (MO) has become increasingly critical in optical lithography to ensure pattern fidelity. In extreme ultraviolet (EUV) lithography, full-chip MO encounters significant challenges in terms of computational accuracy and efficiency, which are exacerbated when employing curvilinear patterns. Herein, we propose a full-chip curvilinear MO framework for EUV lithography that integrates deep-learning-enabled forward modelling with gradient-based inverse optimization.We represent the forward model using a tuneable U-net trained on data generated by an accurate and efficient modified Born series method. This model achieves a significantly lower complexity by describing the 3D mask effect through amplitude and phase perturbations. For inverse optimization, gradients are calculated via the adjoint method using slices of the 3D mask field as input—a significantly more efficient approach than utilising the entire 3D field. Evaluated under typical scenarios, the proposed framework demonstrates a four-order-of-magnitude speedup compared with MO based on the finite-difference time-domain method without compromising accuracy. Leveraging this framework, the MO for a 1 mm2 wafer area with 19.41 nm critical dimensions can be completed in 31.7 h using 1,000 GPUs, highlighting its potential for full-chip EUV curvilinear mask optimization.

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In one month: EUV Pellicles (I think the last stage for mass production of EUV patterned chips) and EUV Curvilinear Masks ​

 

[tokenanalyst]

The development EUV pellicles basically says that you want to keep the EUV mask clean and free of particles because you are going to use it a lot of times. You are not experimenting how to make a EUV mask anymore. From my recollection was the last development in the EUV timeline.