Chinese semiconductor industry

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voyager1

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A major breakthrough in the process below 1 nanometer!TSMC official announces "bismuth" secret weapon​

2021/05/19 06:01:02


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Any comments?
They probably got 1nm-related performance gains but i doubt they managed to do actual 1nm size. 2nm is already pushing it (physics limit?) but 1nm size is in my opinion impossible
 

krautmeister

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Risc-V might be the future in China as even Loongsoon which has its own ISA is planning to build Risc-v chips
I wasn't aware Loongson was doing RISC-V now. They've been working with MIPS for over 10 years and their latest 3A5000 chip now supports x86, ARM and MIPS. It looks like a Frankenstein chip with so many extensions with binary translation for relatively decent performance. The die size must be HUGE!
  • MIPS Linux: 100% native performance of Loongson ISA
  • ARM Android: 90% native performance of Loongson ISA
  • x86 Linux: 80% native performance of Loongson ISA
  • x86 Windows: 70% native performance of Loongson ISA
Imo, I think China needs to go all out on RISC-V while giving support to the Loongson ISA. Loongson can be the bridge for ARM and x86 during the long transition to RISC-V.
 

krautmeister

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Huawei continues finding international government buyers of its gear because they don't want to be spied on through American sponsored backdoors in compromised equipment. If every Samsung customer was aware of the backdoors in that brand, they wouldn't be buying Samsung phones. If IT staff worldwide weren't clueless or in collusion, there would be no Cisco, Juniper, etc. equipment on the Internet backbone.
 

daifo

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I wasn't aware Loongson was doing RISC-V now. They've been working with MIPS for over 10 years and their latest 3A5000 chip now supports x86, ARM and MIPS. It looks like a Frankenstein chip with so many extensions with binary translation for relatively decent performance. The die size must be HUGE!
  • MIPS Linux: 100% native performance of Loongson ISA
  • ARM Android: 90% native performance of Loongson ISA
  • x86 Linux: 80% native performance of Loongson ISA
  • x86 Windows: 70% native performance of Loongson ISA
Imo, I think China needs to go all out on RISC-V while giving support to the Loongson ISA. Loongson can be the bridge for ARM and x86 during the long transition to RISC-V.

From my understanding MIPS/Loongson are native support, ARM/x86 is running on some emulation layer. On their last press release they said they will drop native MIPS and support Loongson/RISC-V in the future.
 

krautmeister

Junior Member
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I wasn't aware Loongson was doing RISC-V now. They've been working with MIPS for over 10 years and their latest 3A5000 chip now supports x86, ARM and MIPS. It looks like a Frankenstein chip with so many extensions with binary translation for relatively decent performance. The die size must be HUGE!
  • MIPS Linux: 100% native performance of Loongson ISA
  • ARM Android: 90% native performance of Loongson ISA
  • x86 Linux: 80% native performance of Loongson ISA
  • x86 Windows: 70% native performance of Loongson ISA
From my understanding MIPS/Loongson are native support, ARM/x86 is running on some emulation layer. On their last press release they said they will drop native MIPS and support Loongson/RISC-V in the future.
I believe they embed QEMU for emulation and achieve improved performance through adding a bunch of registers for their extensions. This increases the die size alot. I don't know by how much but it's expensive so if you combine this extra cost with slower performance vs. native, it isn't that competitive unless you have no choice like China. About MIPS, that was a dead end, it's about time.
 

jfcarli

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I believe they embed QEMU for emulation and achieve improved performance through adding a bunch of registers for their extensions. This increases the die size alot. I don't know by how much but it's expensive so if you combine this extra cost with slower performance vs. native, it isn't that competitive unless you have no choice like China. About MIPS, that was a dead end, it's about time.
It seems Loongsoon is dropping everything (MIPS, x86, RISC-V,etc) and is developing its own architecture called LoongArch.

"Importantly, the LoongArch architecture is completely developed from scratch and has nothing to do with ALPHA, ARM, MIPS, POWER, RISC-V or x86 – an independent evaluation organization came to this conclusion, saying that Loongson has developed its own design of the instruction system, instruction format, instruction coding and addressing modes."
 
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