CMOS-compatible electrochemical nanoimprint: High throughput fabrication of ordered microstructures on semiconductor wafer by using a glassy carbon mold.
-Department of Mechanical and Electrical Engineering, School of Aerospace Engineering, Xiamen University, Xiamen 361005, China
-Key Laboratory of Physical Chemistry of Solid Surfaces (PCOSS), Engineering Research Center of Electrochemical Technologies of Ministry of
-Education, Department of Chemistry, College of Chemistry and Chemical Engineering, Xiamen University, Xiamen 361005, China
-Institute of Machinery Manufacturing Technology, China Academy of Engineering Physics (CAEP), Mianyang, 621900 Sichuan, China
Abstract
Metal assisted chemical etching (MACE), as an emerging wet chemical etching method for fabricating semiconductor micro/nano-structures (MNS), has attracted wide attentions because of the advantages of simple processes, high accuracy and no damages. However, the conventionally used noble metal catalysts (such as Au, Pt,) trapped in the micro/nano-structures are difficult to be removed or reused, not only harming the electronic performances of the CMOS devices but also increasing the fabrication cost. Here, we propose an electrochemical nanoimprint strategy by using a glassy carbon (GC) imprint mold. To overcome the poor electrocatalytic activity of GC, the GC imprint mold was connected to a Pt sheet in the cathodic chamber. To avoid the contaminations of metal and metallic cations in the fabricated MNS, the cathodic chamber was separated from the anodic one by a proton exchange membrane. By optimizing the technical parameters, including the contact pressure between GC imprint mold and GaAs wafer, the concentration of electron acceptor in the cathodic chamber, the imprinting time, etc., a remarkable corrosion rate of about 130 nm/min was achieved, comparable with that of platinum electrocatalyst. Furthermore, by using a GC imprint mold in the spatially separated corrosion cell, the contaminations caused by both the metal catalysts and metallic ions can be eliminated. Thus, this work provides a potential approach to the high throughput fabrication of CMOS-compatible semiconductor microdevices.