SMEE has incorporated grating measurement systems in their dual stage lithography machines.
Chinese semiconductor industry
- Thread starter Hendrik_2000
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And is not spherical anymore, so they are more confident in the structural design.
Confirmed, they have the picture on their
I'd guess havoc took it from there.
Awesome, I wonder if it only got published recently because it has been verified and is getting tested.
That also mean that SMEE litho machines, dry and immersion, are going to get more accurate. A version of this grating technology can be applied to other types of lithography machines like packaging, nano-imprint and direct write lithography machines were overlay is an issue. Also can be used in hybrid bonders machine like the ones of U-precision to improve matching accuracy.
Does anybody know the current progress of High-end ADC chips in China？It is vital for high-precision measurement and radar applications
以ADC芯片为例，在核技术研究等领域，为获得充分的物理信息，对仪器中ADC芯片采样率和垂直分辨率指标都有极高的要求。目前，相关规格的高速高精度ADC芯片，基本被ADI和TI这两家美企垄断，而其顶级产品，也均被列为两用物品受到出口管制，国内很难获取。
而更为外界熟悉的FPGA芯片，瓦森纳协议等机制也按其管脚数、传输速率进行了限制。作为逻辑器件，FPGA芯片的性能不仅由设计决定，更与生产工艺相关，更先进的制程带来更低的阈值电压和功耗、更快的运行速度，目前AMD（赛灵思）UltraScale等高端FPGA制程已演进至16乃至7纳米水平，而国内由于众所周知的限制，国产FPGA在相当长时间内恐怕将很难获得相关先进制程支持。
高端ADC、FPGA芯片受限，反过来对半导体领域也有直接影响。例如不少“专家”大谈特谈所谓Chiplet技术可“弯道超车”，绕开美国对先进制程技术封锁，殊不知2.5D/3D堆叠往往涉及裸片间超高速互连通信，相关接口IP由于瓦森纳协议对高性能示波器及分析软件的禁运，国内同样很难进行开发，而示波器的核心元件，正是高速高精度ADC芯片和高传输速率的FPGA芯片。
FPGA这条赛道在国内已堪称“显学”，相比之下，高端ADC芯片则仍显冷清，不少院校看似ADC芯片研究论文不断，细加辨析往往是用“师兄留下的方案”修修补补，仿真跑出个别不错的指标交差，方案再传承给下一届师弟，成果的“成色”可想而知。772所等机构的产品则面向航天军工等小批量科研生产的特殊领域，难以进入公开市场。
目前，尽管也有一些海外人才归国创办企业，从事高性能ADC芯片开发，但作为模拟芯片中极为考校手艺积累的“硬骨头”，现有产品性能与ADI等大厂还有不小的距离。除了设计能力，在产品流片环节，虽然不需要先进制程支持，但台积电等海外厂商对此类敏感产品审核极其严苛，而国内55-28纳米代工产能尽管渐具规模，适应高性能模数混合芯片需求的工艺库仍然尚待完善。
Taking the ADC chip as an example, in the field of nuclear technology research and other fields, in order to obtain sufficient physical information, there are extremely high requirements on the sampling rate and vertical resolution of the ADC chip in the instrument. At present, high-speed and high-precision ADC chips with relevant specifications are basically monopolized by two American companies, ADI and TI, and their top products are also listed as dual-use items and subject to export controls, making it difficult to obtain domestically.
The FPGA chip, which is more familiar to the outside world, mechanisms such as the Wassenaar protocol are also limited according to the number of pins and the transmission rate. As a logic device, the performance of the FPGA chip is not only determined by the design, but also related to the production process. More advanced manufacturing processes bring lower threshold voltage and power consumption, and faster operating speed. Currently, AMD (Xilinx) UltraScale and other high-end The FPGA process has evolved to the level of 16 or even 7 nanometers. Due to the well-known limitations in China, it may be difficult for domestic FPGAs to obtain relevant advanced process support for a long time.
High-end ADC and FPGA chips are limited, which in turn has a direct impact on the semiconductor field. For example, many "experts" talk about the so-called Chiplet technology that can "overtake on a curve" and bypass the US blockade of advanced process technology. They don't know that 2.5D/3D stacking often involves ultra-high-speed interconnection and communication between dies. The Wassenaar Agreement’s embargo on high-performance oscilloscopes and analysis software is also difficult to develop in China, and the core components of oscilloscopes are high-speed and high-precision ADC chips and high-transmission FPGA chips.
The field of FPGA can be regarded as "remarkable learning" in China. In contrast, high-end ADC chips are still deserted. Many colleges seem to have a lot of research papers on ADC chips. The "plan" was tinkered with, the simulation ran out some good indicators, and the plan was passed on to the next generation of juniors. The "quality" of the results can be imagined. The products of the 772 Institute and other institutions are aimed at special fields of small-batch scientific research and production such as aerospace and military industry, and it is difficult to enter the open market.
At present, although some overseas talents have returned to China to start companies and engage in the development of high-performance ADC chips, as the "hard bones" of analog chips, the performance of existing products is still far behind that of major manufacturers such as ADI. In addition to design capabilities, although advanced process support is not required in the product tape-out process, overseas manufacturers such as TSMC are extremely strict in reviewing such sensitive products. The process library required by digital hybrid chips still needs to be perfected.
以ADC芯片为例，在核技术研究等领域，为获得充分的物理信息，对仪器中ADC芯片采样率和垂直分辨率指标都有极高的要求。目前，相关规格的高速高精度ADC芯片，基本被ADI和TI这两家美企垄断，而其顶级产品，也均被列为两用物品受到出口管制，国内很难获取。
而更为外界熟悉的FPGA芯片，瓦森纳协议等机制也按其管脚数、传输速率进行了限制。作为逻辑器件，FPGA芯片的性能不仅由设计决定，更与生产工艺相关，更先进的制程带来更低的阈值电压和功耗、更快的运行速度，目前AMD（赛灵思）UltraScale等高端FPGA制程已演进至16乃至7纳米水平，而国内由于众所周知的限制，国产FPGA在相当长时间内恐怕将很难获得相关先进制程支持。
高端ADC、FPGA芯片受限，反过来对半导体领域也有直接影响。例如不少“专家”大谈特谈所谓Chiplet技术可“弯道超车”，绕开美国对先进制程技术封锁，殊不知2.5D/3D堆叠往往涉及裸片间超高速互连通信，相关接口IP由于瓦森纳协议对高性能示波器及分析软件的禁运，国内同样很难进行开发，而示波器的核心元件，正是高速高精度ADC芯片和高传输速率的FPGA芯片。
FPGA这条赛道在国内已堪称“显学”，相比之下，高端ADC芯片则仍显冷清，不少院校看似ADC芯片研究论文不断，细加辨析往往是用“师兄留下的方案”修修补补，仿真跑出个别不错的指标交差，方案再传承给下一届师弟，成果的“成色”可想而知。772所等机构的产品则面向航天军工等小批量科研生产的特殊领域，难以进入公开市场。
目前，尽管也有一些海外人才归国创办企业，从事高性能ADC芯片开发，但作为模拟芯片中极为考校手艺积累的“硬骨头”，现有产品性能与ADI等大厂还有不小的距离。除了设计能力，在产品流片环节，虽然不需要先进制程支持，但台积电等海外厂商对此类敏感产品审核极其严苛，而国内55-28纳米代工产能尽管渐具规模，适应高性能模数混合芯片需求的工艺库仍然尚待完善。
Taking the ADC chip as an example, in the field of nuclear technology research and other fields, in order to obtain sufficient physical information, there are extremely high requirements on the sampling rate and vertical resolution of the ADC chip in the instrument. At present, high-speed and high-precision ADC chips with relevant specifications are basically monopolized by two American companies, ADI and TI, and their top products are also listed as dual-use items and subject to export controls, making it difficult to obtain domestically.
The FPGA chip, which is more familiar to the outside world, mechanisms such as the Wassenaar protocol are also limited according to the number of pins and the transmission rate. As a logic device, the performance of the FPGA chip is not only determined by the design, but also related to the production process. More advanced manufacturing processes bring lower threshold voltage and power consumption, and faster operating speed. Currently, AMD (Xilinx) UltraScale and other high-end The FPGA process has evolved to the level of 16 or even 7 nanometers. Due to the well-known limitations in China, it may be difficult for domestic FPGAs to obtain relevant advanced process support for a long time.
High-end ADC and FPGA chips are limited, which in turn has a direct impact on the semiconductor field. For example, many "experts" talk about the so-called Chiplet technology that can "overtake on a curve" and bypass the US blockade of advanced process technology. They don't know that 2.5D/3D stacking often involves ultra-high-speed interconnection and communication between dies. The Wassenaar Agreement’s embargo on high-performance oscilloscopes and analysis software is also difficult to develop in China, and the core components of oscilloscopes are high-speed and high-precision ADC chips and high-transmission FPGA chips.
The field of FPGA can be regarded as "remarkable learning" in China. In contrast, high-end ADC chips are still deserted. Many colleges seem to have a lot of research papers on ADC chips. The "plan" was tinkered with, the simulation ran out some good indicators, and the plan was passed on to the next generation of juniors. The "quality" of the results can be imagined. The products of the 772 Institute and other institutions are aimed at special fields of small-batch scientific research and production such as aerospace and military industry, and it is difficult to enter the open market.
At present, although some overseas talents have returned to China to start companies and engage in the development of high-performance ADC chips, as the "hard bones" of analog chips, the performance of existing products is still far behind that of major manufacturers such as ADI. In addition to design capabilities, although advanced process support is not required in the product tape-out process, overseas manufacturers such as TSMC are extremely strict in reviewing such sensitive products. The process library required by digital hybrid chips still needs to be perfected.
China should be sanctioning Estevez.
Bro the greatest payback is to make him look stupid and how to do that? Sell the Korean Chinese made lithography and make them Sinicized their production. That will be a liberating feeling and a Strategic decision because its a win win situation and SK will abandon the US and join the Fair World Order.
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havok：与嘉定icrd相关的另一个制造厂准备开工
havok：不是中试线是正规生产线，主要生产图像芯片，技术源自ICRD
havok：下图是ASML 0.55NA EUV的腔体，ASML是自己加工生产腔体，有专门的龙门车床
havok: Another manufacturing plant related to Jiading ICRD is ready to start
havok: It is not a pilot line but a regular production line, mainly producing image chips, and the technology comes from ICRD
havok: The picture below is the cavity of ASML 0.55NA EUV. ASML processes and produces the cavity by itself, and has a special gantry lathe
havok：不是中试线是正规生产线，主要生产图像芯片，技术源自ICRD
havok：下图是ASML 0.55NA EUV的腔体，ASML是自己加工生产腔体，有专门的龙门车床
havok: Another manufacturing plant related to Jiading ICRD is ready to start
havok: It is not a pilot line but a regular production line, mainly producing image chips, and the technology comes from ICRD
havok: The picture below is the cavity of ASML 0.55NA EUV. ASML processes and produces the cavity by itself, and has a special gantry lathe
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