Chinese semiconductor industry

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ZeEa5KPul

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Naura:
Physical Vapor deposition, atomic layer deposition and sputtering
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Chemical Vapor deposition, low pressure, atmospheric pressure, epitaxy growth and plasma enhanced
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AMEC:
Metal organic chemical vapor deposition
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Sypiotech:
Sub atmospheric pressure, plasma enhanced and atomic layer depoistion
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Alphasemi:
Epitaxial deposition for NAND
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Leadmicro:
Atomic Layer deposition
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CETC:
Chemical, Physical, plasma enhanced, electrochemical deposition, sputtering.
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ACM Research:
plasma enhanced and electrochemical deposition
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Wanye enterprise Jiaxin
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There are others who have pretty nice research equipment. this is one.
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NAURA and Shenyang Piotech.
How do they match up to the leading edge?
 

theorlonator

Junior Member
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Can anyone explain the basic steps for fabrication? I see lots of companies and equipment types but I wonder what the basic sequence of steps is to fab the chip using all that equipment like etch, deposition, lithography.
 

BlackWindMnt

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Kind of a noob question here, but from what I understand programs are written based on a particular OS, and then simply compiled to suit whichever instruction set the user's CPU is using, is that correct?

Does that mean instruction set doesn't really matter for the end user, since the OS and programs available will be similar?
It kind of depends what sort of language we are talking about.

But the general gist is you have general code then you have OS specific code like playing sound, showing a window etc. This code gets compiled down to either byte code or some intermediate representation.

Byte code is usually used for programming languages that are run in some sort virtual machine/runtime. Think about Android application, Java application etc. So if the virtual machine runs on the OS those sort of application can usually run on that OS too with minimal impact. That is why you can run Android app on windows and Linux.

Then you have the code that get compile into a intermediate representation this is usually consumed by a low level virtual machine which will feed this intermediate code into a specific compiler backend. The compiler backend will compile this intermediate code into platform specific code like x86, x64, arm, RISCV etc. Usually the platform holder and open source contributors will provide the compiler backend.

The intermediate representation languages are really specifically compiled for a platform but the intermediate code can be compiled to other platforms as long there is a compiler backend. This is usually called cross compiling.

The byte code based languages once compiled to byte code don't have to be platform or OS specific as long as the virtual machine that runs the byte code can run the byte code based program should also be able to run.
 

BoraTas

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Can anyone explain the basic steps for fabrication? I see lots of companies and equipment types but I wonder what the basic sequence of steps is to fab the chip using all that equipment like etch, deposition, lithography.
Trade secrets. Changes from process to process and fab to fab. But you can find basic summaries on the internet
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tokenanalyst

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How do they match up to the leading edge?
most are used for 28nm or less and 3DNAND, but is difficult question to answer, some equipment are used for some materials or processes. I guess not all materials or processes are covered but they are working hard on it.
Can anyone explain the basic steps for fabrication? I see lots of companies and equipment types but I wonder what the basic sequence of steps is to fab the chip using all that equipment like etch, deposition, lithography.
depends, planar transistors have their own steps, finfet is a bit more complicated.
cleaning, etching, deposition, lithography, polishing, implantation, oxidation, rapid thermal processing. All of those
have substeps with different materials and equipment.

I think this could give an idea.

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