Nope, sorry. The only reason I remember that factoid is because I was looking for reliable indicators for when China's EUVL will be ready, like WTAN's posts, havok's posts before he got the MSS banhammer, etc. All of them indicated around 2025.
Chinese semiconductor industry
- Thread starter Hendrik_2000
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Is a critical process in semiconductor manufacturing nowday specially in smaller nodes, 3D NAND and advanced packaging.
Hwatsing Technology Co, they are very advance in this area, their products are used in 3D NAND and process nodes from 14nm-28nm.
Apart for having products for 3D packaging
With more effort and commercial incentive have a working prototype much sooner than most people think is not impossible.
Patentguru has a nice list.
Younger people are a lot more educated than older people in China. When the population shrinks it will be the oldest part of the labor force, not the youngest part, that leaves, and as a result the same time China’s labor force is shrinking it will also become increasingly better educated. Insofar as high skill industries are concerned China’s labor situation is getting better, not worse, even as population decline kicks into higher gear.
The two biggest sticking points for early EUV development, and why EUV was adopted a decade later than intended, was laser power and optimizing the plasma dynamics of the tin droplets. The baseline knowledge and tools for handling both are much better today than they were a decade and a half ago.
I am not even saying they will have a high NA 200 WPH EUV machines in three years. But there is a technical reason why they shouldn't be able to create working prototypes like the ones ASML created 12 years ago, in a relative short time? Nothing crazy, low NA, 10-20 WPH.
And I’m saying they shouldn’t have to start at what ASML produced 12 years ago. If the rumors pan out they’re already starting with light sources far more powerful than what ASML had 12 years ago, with a much better idea of how to optimize the interaction between the laser and tin droplets than anyone in 2005 to maximize light output needed to do more than 10-20 WPH. By far the biggest driving factor for wafer processing speed is photon dosage per area, and that’s dictated by your light output.
I just put it as the lower limit, if is "imposible" to reach what ASML did 12-15 years ago in a reasonable short time with all the design advantages and know how that we have today then we may need some technical explanation why.
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