Chinese semiconductor industry

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hvpc

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As mentioned by @foofy from his previous past post (thanks for confirming) how many? If NXT 2050i cost $80 million, then a maximum of 15 units may had been bought by SMIC. As a way of achieving its 2 prong strategy by developing 7nm and 5nm core competency using foreign machine while indigenizing 28nm and 14nm production line.

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Mar 3, 2021 — Chinese chipmaker Semiconductor Manufacturing International Corporation (SMIC), announced on Wednesday a deal for $1.2 billion worth of ...
: ) 15 2050 system would be nice. But that 1.2B purchase is spread out across all front end litho systems to support all SMIC’s fab expansions. And if we study SMIC’s public financial reports we’ll see most of their expansion and growth is not in advanced technology nodes.

More likely at least ore or two systems to support R&D and limited pilot production. SMIC is in the business of making a profit. I would certainly hope they would invest wisely and watch their operational expenses. Splurging in the latest tech to manufacture 28nm is not very wise from profitability stand point. But then again, maybe they are panic buying…buying as much advanced tech while they still can before US cut them off.

My sources confirmed two system, but they don’t know if more 2050 are on their way to SMIC or not.
 

AndrewS

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: ) 15 2050 system would be nice. But that 1.2B purchase is spread out across all front end litho systems to support all SMIC’s fab expansions. And if we study SMIC’s public financial reports we’ll see most of their expansion and growth is not in advanced technology nodes.

More likely at least ore or two systems to support R&D and limited pilot production. SMIC is in the business of making a profit. I would certainly hope they would invest wisely and watch their operational expenses. Splurging in the latest tech to manufacture 28nm is not very wise from profitability stand point. But then again, maybe they are panic buying…buying as much advanced tech while they still can before US cut them off.

My sources confirmed two system, but they don’t know if more 2050 are on their way to SMIC or not.

But if SMIC have an operating margin of 40%, then arguably increasing revenue is more important than controlling costs.

Plus you can hardly call 28nm "splurging on the latest tech"
 

hvpc

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E beam is far too slow for even rudimentary mass production. Only possible for super high value super low volume items like photomasks.

There's a lot of processes that are not used in the leading edge semiconductor plants that are used elsewhere, due to equipment limitations or to maximize productivity of old equipment, such as dry KrF double exposure. Here's a paper from Germany describing getting 100 nm out of a non OPC KrF equipment with double exposure.

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COMAC hasn't delivered a commercial product (mostly due to market share issues and being a late arrival to an industry that requires foreign approval) but SMEE already has decent market share in display, packaging and larger node lithography competing with Canon. If you set up a competitor to it then the logical thing for a company to do is abandon R&D to focus on what already makes money.

Competition = high performance is just another form of market fundamentalism no less destructive than religious fundamentalism. See what happened to Russia and especially Ukraine.
Thanks for trying to answer my question. But Do you know what and how CETC plan to use to make 28nm chips?

For low volume, exploratory applications, this is where ebeam litho is positioned for. this removes need for photomask and the long cycle time involves in OPC optimization and sourcing masks. Military application is an exact fit. I wouldn’t be surprised if this is their approach. So…can anyone confirm ebeam as the mean to hit 28nm or verify they are developing immersion on their own?

As double as exposure, this provide a bit more process window in only selective application. Article you referenced is trying to squeeze a bit more performance out of KrF. In reality, it’s not economical to use KrF Double exposure lithography (DEL) instead of ArF. For a R&D lab trying to extend KrF performance, this makes sense. But for fabs that are trying to make lots of money, it’s more economics to just go to ArF. No one would bother with KrF DEL. Besides DEL is only good for 2D like patterns that is applicable mostly to memory guys. DEL has no place in a logic application.

I infer you may be suggesting ArF DEL for 28nm. I strongly doubt that would work.
 

hvpc

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But if SMIC have an operating margin of 40%, then arguably increasing revenue is more important than controlling costs.

Plus you can hardly call 28nm "splurging on the latest tech"
First, SMIC operating margin is not that high. Their gross margin is not even that high.

Second, they had already informed the analysts that GM will start to decrease starting this year. Why? SMIC only started to spend in 2020 and spent more in 2021. These will start to be depreciated…so the GM will start to come down.

Third, we made 28nm with NXT1950 a decade ago. SMIC using 1980 (a tool designed for 10nm) is already an overkill. So I’m curious why you would think using 2050 which is almost 3-4x in price compare to 1950 ‘not a splurge’?

In my industry, it’s all about P&L. Using tool that is 5 generations more advanced and for a technology where wafer price is maybe half of where it used to be. No way SMIC management is that dumb. If that’s the case, I’ll selling all my SMIC stocks right away. I know for a fact SMIC management is smart and committed to make money for shareholders…that’s why I’m long SMIC.

SMIC will do their part to support the national ambition and the current 5-year project. And I hope that effort will eventually be successful because that will turn into more profit for SMIC (and me). BUT,at the end of the day the reality for a corporation is that P/L will come first and nationalism is a distant second.
 

FairAndUnbiased

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Thanks for trying to answer my question. But Do you know what and how CETC plan to use to make 28nm chips?

For low volume, exploratory applications, this is where ebeam litho is positioned for. this removes need for photomask and the long cycle time involves in OPC optimization and sourcing masks. Military application is an exact fit. I wouldn’t be surprised if this is their approach. So…can anyone confirm ebeam as the mean to hit 28nm or verify they are developing immersion on their own?

As double as exposure, this provide a bit more process window in only selective application. Article you referenced is trying to squeeze a bit more performance out of KrF. In reality, it’s not economical to use KrF Double exposure lithography (DEL) instead of ArF. For a R&D lab trying to extend KrF performance, this makes sense. But for fabs that are trying to make lots of money, it’s more economics to just go to ArF. No one would bother with KrF DEL. Besides DEL is only good for 2D like patterns that is applicable mostly to memory guys. DEL has no place in a logic application.

I infer you may be suggesting ArF DEL for 28nm. I strongly doubt that would work.
???

Multiple exposure ArF immersion lithography is applied to 14 nm logic chips all the time.

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It is a standard TSMC process.

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Are you saying that multi patterning works only for immersion but not dry lithography?????
 

hvpc

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???

Multiple exposure ArF immersion lithography is applied to 14 nm logic chips all the time.

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It is a standard TSMC process.

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Are you saying that multi patterning works only for immersion but not dry lithography?????
First, There is a difference between double exposure and double patterning, my friend.

Second, DEL, multiple patterning techniques on immersion and EUV makes sense economically. I inferred you were suggesting DEL using non immersion DUV to hit 28nm; it’s towards this that I thought wouldn’t make sense.
 

FairAndUnbiased

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First, There is a difference between double exposure and double patterning, my friend.

Second, DEL, multiple patterning techniques on immersion and EUV makes sense economically. I inferred you were suggesting DEL using non immersion DUV to hit 28nm; it’s towards this that I thought wouldn’t make sense.
Double exposure is a form of double patterning. But yes I should have been more general and said multiple patterning.

If immersion lithography tools are not available then the cost for that technique is infinite in the short term and equal to the development cost of all associated equipment in the long term. Thus any technique used to get 28 nm process equivalent pitch is economically viable if immersion lithography is not available to a certain vendor.

No matter how slow multi patterning dry ArF is it's still far faster than E beam, it's not even close, simply because ebeam is direct write and write time scales with pattern complexity while any projection lithography technique writes the entire mask at once regardless of complexity.
 

tokenanalyst

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Thanks for trying to answer my question. But Do you know what and how CETC plan to use to make 28nm chips?

For low volume, exploratory applications, this is where ebeam litho is positioned for. this removes need for photomask and the long cycle time involves in OPC optimization and sourcing masks. Military application is an exact fit. I wouldn’t be surprised if this is their approach. So…can anyone confirm ebeam as the mean to hit 28nm or verify they are developing immersion on their own?

As double as exposure, this provide a bit more process window in only selective application. Article you referenced is trying to squeeze a bit more performance out of KrF. In reality, it’s not economical to use KrF Double exposure lithography (DEL) instead of ArF. For a R&D lab trying to extend KrF performance, this makes sense. But for fabs that are trying to make lots of money, it’s more economics to just go to ArF. No one would bother with KrF DEL. Besides DEL is only good for 2D like patterns that is applicable mostly to memory guys. DEL has no place in a logic application.

I infer you may be suggesting ArF DEL for 28nm. I strongly doubt that would work.
They do have patents in E-Beam lithography quoting mask production for while and they suggested the method for multi-gate RAD finfets, but i think the process could be really slow for chip development. So i am more inclined to think they could have a low volume ArF immersion lithography machines, Immersion has been in research for quite some time in China.
There is also the wildcard that they are using EUV for low volume chip production, is an Area were China already have some hardware.

Also to be said multiple patterning with Dry lithography could the most credible knowing that we now they have a ArF machine already working.

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hvpc

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First, There is a difference between double exposure and double patterning, my friend.

Second, DEL, multiple patterning techniques on immersion and EUV makes sense economically. I inferred you were suggesting DEL using non immersion DUV to hit 28nm; it’s towards this that I thought wouldn’t make sense.
I only realized after I responded to you that you attached yet another paper. I’m impressed by the fact you seemed to have read a lot of papers and have good understanding of semiconductor process.

So, I quickly glanced through the paper. It was written by someone that most likely do not have actual fab experience. From what I see, he was talking about multiple patterning. Or what is know as LELE (litho-etch-litho-etch). He incorrectly called that double exposure.

Double exposure is LLE. And that is what the previous paper you shared in KrF is.
 
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