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The "breakthrough" was China catching up to the global frontier, not pushing the global frontier outwards
Chinese semiconductor industry
- Thread starter Hendrik_2000
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Once the 14nm/16nm Trials have been done and is sucessful and a Localised 14nm Production Line is established, then Yes, a 7nm Production Line will quickly follow.
Much of the Semiconductor Equipment used to produce 14nm Chips can be used to produce 7nm Chips with minimal changes.
SMIC is using its 14nm FAB to produce 7nm/8nm Chips.
Recent news is that North Semi Co is seeking funding to develop a range of Equipment for 5nm to 7nm Process.
Synopsis and Cadence are not Empyrean. American EDA is in the process of being sanctioned from selling any designs <=14nm, so it's definitely not the same thing using American EDA softwares or China based EDA softwares. Whether you think the UI is similar is irrelevant. It is imperative that China universities stop training their students to use American EDA software. It turns alot of those students into American parrots who will demand the continued use American EDA even if there are domestic alternatives.
Btw, I heard recent news of a "BREAKTHROUGH" where SMEE could achieve 16nm process FINFET through double patterning.
Thanks for the update, glad that lithography equipment readiness went smoothly.
Having said that, do you have info regarding other equipment and materials progress?
Might be worth elaborating what’s actually going on with EDA here. All that’s going on is that you have a grid of transistors with a set of circuit sequences and arrangements for logic or some other electrical function, and you need code that can simulate how different sequences and groupings of these transistors will perform for a certain set of instructions and tasks so that you can figure out the best way to arrange your different circuit components before you go ahead and make your chips. It’s actually not rocket science. It’s just that if no one uses your tools you don’t get feedback on how to customize the software features that’s most optimal for your customers. That’s the gap between Empyrean and Cadence. That’s it.
@caudaceus me to bro and thanks to @WTAN @foofy and @Oldschool especially about the news on CETC 35nm DUVL development. I had that feeling that there is a breakthrough, the calmness and confidences. China is silent so not to arouse the US. It had a major geopolitical implication especially if 7nm line go in production. It will effectively embarrass the US since it specifically ban that node. And we're getting there, I think SK and Japan may have an idea on China semi tech progress, since they're not as gung ho in following Washington wishes of restraining China.
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If you train on one EDA software you’re training on all of them. If anything, you want your Chinese students to use American EDA so they know what features they need to inform your domestic EDA developments.
According to HLMC, back in 2019, it was targeting production of their 14nm FINFET process by the end of 2020. That never actually happened and I haven't heard any further word of it since then. It just so happened that the American sanctions on semiconductors dramatically ramped up in 2019. I would bet money that HLMC has delayed their 14nm process roadmap to coincide with development of domestic China lithograph equipment so they could participate in the 14-16nm trials later this year.
@krautmeister thanks bro for the info, never heard of HLMC until now, so China had three FABS, SMIC, HLMC and Hua hong and in the future Huawei with the help of Shanghai ICRD. Bro if the aim of slowing down Huawei do you think the US succeeded? I know based station especially 5G needed chips 14nm and below to able to operate efficiently?
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