antiterror13
Brigadier
This article is from 2019, but basically confirms that the first Prototype of the SMEE 28nm Immersion DUVL will be assembled by the end of 2020.
Can it produce 14nm chips with multi patterning ?
This article is from 2019, but basically confirms that the first Prototype of the SMEE 28nm Immersion DUVL will be assembled by the end of 2020.
Epolith AO75 is the first generation of Optics and is only good for 90nm.@WTAN
does SMEE 28nm DUV uses the same projection lens system as the 90nm SSA600 ? only difference is using immersion or water therefore increase the resolution? SMEE using 国望光学 projection lens. I checked their website their product is Epolith A075型曝光光学系统
Its only good for 90nm under air or dry condition. There is no other system on their website.
Epolith A075型曝光光学系统是“国家科技重大专项02专项”的核心研究成果之一,是我国首套具有全部自主知识产权的90nm节点光刻机曝光光学系统。
It can produce 28nm Chips with Single Exposure/Patterning.Can it produce 14nm chips with multi patterning ?
@WTAN i was wondering how much time is added with multi patterning and how much throughput drops with multi patterning, so for example N vs N+1, would it be a straight up doubling of time and 1/2 throughput or is it more nuanced like does it depend on chip design or other factors?It can produce 28nm Chips with Single Exposure/Patterning.
Yes it can produce 14nm with Multiple Exposures.
At the moment it cant do 7nm as more work has to be done to improve the accuracy and precision of the machine.
Thanks for the update.It can produce 28nm Chips with Single Exposure/Patterning.
Yes it can produce 14nm with Multiple Exposures.
At the moment it cant do 7nm as more work has to be done to improve the accuracy and precision of the machine.
How much time do you think that work will take?At the moment it cant do 7nm as more work has to be done to improve the accuracy and precision of the machine.
How much time do you think that work will take?
With Multiple Patterning there is certainly greater cost and time involved.@WTAN i was wondering how much time is added with multi patterning and how much throughput drops with multi patterning, so for example N vs N+1, would it be a straight up doubling of time and 1/2 throughput or is it more nuanced like does it depend on chip design or other factors?