1-For the development of this new immersion scanner, ASML collaborated with various teams and suppliers on the wafer handler (VDL), the wafer stage (VDL and Kyocera), the wafer table (Berliner Glass), the production of the immersion hood (AAE), the reticle stage (ASML’s Wilton factory) and the projection lens (Zeiss). Cymer and Gigaphoton from Japan delivered a pulse stretcher on the lasers that reduced the speckle, resulting in much lower scanner-induced line-width roughness.I didn’t find any mention of the interferometers in the critical improvements introduced to NXT:2050i. Maybe they were already good enough?
2-The reticle isn’t exposed in a flash of light, like in a stepper, but in a scanning way, just like a photocopier. For this, the scanner has to hold the reticle stage, move the reticle and clamp and hold the wafer on the wafer table. “Not only to flatten it but also to keep it at the right temperature and hold and move the wafer,” explains Paarhuis. The forces released by these movements are impressive and have to be counterbalanced. However, minor overlay errors caused by these accelerations can still be seen as a nanopattern in the exposures: the errors vary from row to row and from field to field. The 2050 system offers increased stiffness and integrated damping in the wafer stage. Paarhuis: “We were able to reduce the overlay errors by more than a factor of two.”
3-To decrease the overlay errors and simultaneously improve productivity, ASML had to do substantially more wafer alignment measurements in less time. “On the NXT:2000 system, we could measure 28 alignment marks at 275 wafers per hour,” says Paarhuis. “Without extra measures to accelerate the measurements, we ended up locating only 20 alignment marks at 295 wafers per hour.” To do all checks in time, the 2050 team accelerated the alignment scans and measurements of the wafer height map. “We made them faster and were also able to optimize the routing in between the marks.”
As a result, the 2050 system can measure 55 marks at 295 wafers per hour. “This enables a better overlay because we can more accurately measure the shape of the wafer.”
4-A few years ago, ASML found another overlay error contribution. Paarhuis: “Analyzing the data, we discovered a very typical scan-up-scan-down fingerprint.” This distortion pattern is caused by the DUV pellicle and contributes to the errors in DUV-EUV matching.
The solution is running a model on the scanner that reduces the pellicle impact. “Using the reticle stage trajectory, we can predict the pellicle bending and use a model to calculate the needed overlay corrections and apply them during exposures.” This works pretty well, says Paarhuis. The model predicts the required correction with an error of only 0.1-0.2 nanometers. “That’s very nice.”
I think 3 and 4 are algorithmic optimizations but those optimizations require better sensors with very low overhead to really make a impact in performance.
They did changed in 2017 their SMASH alignment sensor with a new improved ORION alignment sensor, so i guess that require better improved interferometers.